Verifaix

At SEMICON West 2026, VerifAIX CEO and Founder Madhulima Tewari presented how a verification trust layer can make autonomous chip design trustworthy enough for tapeout, combining LLM reasoning with deterministic proof techniques while targeting approximately 10× lower AI token costs.

VerifAIX has raised $5 million in seed funding, co-led by Bluehill VC and Endiya Partners, to build a verification trust layer for AI-driven chip design. The round supports development of the Formal Brain and expansion of the company’s engineering teams across the US, India, and Israel.

After a design change, a single edit can break hundreds of assertions across the regression suite. The VerifAIX Debug Agent triages those failures, identifies the root cause, proposes fixes, and iterates to closure, with an engineer giving final approval.

AI is helping verification teams write SystemVerilog and generate assertions faster. But with assertions, more is not necessarily better. A set that just echoes the RTL could be adding more noise than confidence. What is important is finding real bugs faster and covering the design intent more completely.

DAC 63 2026The CHIPS TO SYSTEMS CONFERENCE

The semiconductor industry is in a relentless race toward faster, smaller,…